No Outline
121 Medium Journal "プラスチックスエージ 3 Vol.60 2014 Mar"
Headline 単層カーボンナノチューブ量産技術
Date 2014.2.21
Page p.26
120 Medium Journal "日経エレクトロニクス"
Headline 特集 炭素から新産業
Date 2014.2.17
Page p. 21-44
119 Medium web "J-Net21 (WEB)"
Headline 半導体型単層カーボンナノチューブを選択的に合成する技術開発に成功―最大98%の高い選択率を実現―
Date 2014.2.17
Page HP
118 Medium Newspaper "化学工業日報"
Headline 半導体型単層CNTを選択的に合成 産総研が新技術
Date 2014.2.13
Page 8面
117 Medium web "EE Times Japan (WEB)"
Headline 産総研、半導体型単層カーボンナノチューブの選択的合成に成功
Date 2014.2.13
Page HP
116 Medium web "マイナビニュース (WEB)"
Headline 産総研、金属触媒を予め調整する半導体型単層CNTの選択的合成技術を開発
Date 2014.2.13
Page HP
115 Medium web "日経バイオテクONLINE (WEB)"
Headline 産業技術総合研究所、半導体型単層カーボンナノチューブを選択的に合成する技術開発に成功-最大98%の高い選択率を実現-
Date 2014.2.13
Page HP
114 Medium web "日経プレスリリース (WEB)"
Headline 産総研、半導体型単層カーボンナノチューブを選択的に合成する技術開発に成功
Date 2014.2.13
Page HP
113 Medium web "産総研プレスリリース"
Headline 半導体型単層カーボンナノチューブを選択的に合成する技術開発に成功
Date 2014.2.12
Page HP
112 Medium Journal "AEI Febrary 2014"
Headline Graphene Replaces Copper in Ultra-Narrow LSI Wiring
Date 2014.2.1
Page p. 68-69
111 Medium web "Nikkan Kogyo Shimbun (WEB)"
Headline 産総研など、電子移動度を2倍に向上したInGaAsトランジスタ開発
Date 2014.1.15
Page HP
110 Medium web "Nikkan Kogyo Shimbun (WEB)"
Headline 産総研、3次元LSI向けゲルマニウム素子動作に成功-小型・高機能化に道
Date 2013.12.18
Page HP
109 Medium Newspaper "The Chemical Daily"
Headline 多結晶Ge p、n両極性のトランジスタ動作に成功
Date 2013.12.16
Page 8
108 Medium web "日経ビジネスオンライン"
Headline ひらめき支える充実時間
平日は次世代LSIの研究開発にまい進
Date 2013.12.13
Page HP
107 Medium Newspaper "The Chemical Daily"
Headline グラフェン微細配線開発 LSI銅配線を代替へ
Date 2013.12.13
Page 8
106 Medium web "Nikkan Kogyo Shimbun (WEB)"
Headline 産総研、グラフェンで超微細配線を作製-断線に強く銅並み抵抗率
Date 2013.12.13
Page HP
105 Medium web "環境ビジネスオンライン (WEB)"
Headline カーボンナノチューブを使った集積回路の配線が新開発 1ケタ以上低い抵抗
Date 2013.12.13
Page HP
104 Medium web "日経バイオテクONLINE (WEB)"
Headline 独立行政法人 産業技術総合研究所、カーボンナノチューブのインプラントによる新たな配線作製技術
Date 2013.12.13
Page HP
103 Medium web "My Navi News (WEB)"
Headline シリコン貫通電極への応用に期待! - 産総研、新たなCNT配線作製技術を開発
Date 2013.12.13
Page HP
102 Medium web "My Navi News (WEB)"
Headline 産総研、多結晶Geでp/n両極性のトランジスタ動作に成功 - CMOS回路も視野に
Date 2013.12.13
Page HP
101 Medium Newspaper "The Chemical Daily"
Headline 産総研 高温合成で抵抗改善
CNT配線 製作の新技術 LSIなど応用へ
Date 2013.12.12
Page 8
100 Medium web "Nikkan Kogyo Shimbun (WEB)"
Headline 産総研、CNTで配線作製-基板の微細穴に転写・挿入
Date 2013.12.12
Page HP
99 Medium web "My Navi News (WEB)"
Headline 産総研、20nm幅の多層グラフェン配線を作製し、低抵抗、高信頼性を実証
Date 2013.12.12
Page HP
98 Medium web "日経プレスリリース (WEB)"
Headline 産総研、カーボンナノチューブを利用した新たな配線作製技術を開発
Date 2013.12.12
Page HP
97 Medium web "J-Net21 (WEB)"
Headline カーボンナノチューブのインプラントによる新たな配線作製技術-LSI配線やシリコン貫通電極への応用に期待-
Date 2013.12.12
Page HP
96 Medium web "ASCII.jp (WEB)"
Headline チップの消費電力を1/100にするかもしれないカーボン系ナノ配線技術
Date 2013.12.12
Page HP
95 Medium web "日経バイオテクONLINE (WEB)"
Headline 産業技術総合研究所、20nm幅の高性能なグラフェン微細配線を開発-LSI銅微細配線の代替に期待-
Date 2013.12.12
Page HP
94 Medium web "日経プレスリリース (WEB)"
Headline 産総研、多結晶ゲルマニウムでp、n両極性のトランジスタ動作に成功
Date 2013.12.12
Page HP
93 Medium web "AIST press release"
Headline 多結晶ゲルマニウムでp、n両極性のトランジスタ動作に成功
Date 2013.12.12
Page HP
92 Medium web "AIST press release"
Headline カーボンナノチューブ・インプラントによる新たな配線作製技術を開発
Date 2013.12.11
Page HP
91 Medium web "My Navi News (WEB)"
Headline IEDM 2013 - 産総研、新構造で2倍性能が向上したInGaAsトランジスタを開発
Date 2013.12.11
Page HP
90 Medium web "日経バイオテクONLINE (WEB)"
Headline 産業技術総合研究所、InGaAsトランジスタの性能向上のための新構造を開発
Date 2013.12.11
Page HP
89 Medium web "日経プレスリリース (WEB)"
Headline 産総研、20nm幅の高性能なグラフェン微細配線を開発
Date 2013.12.11
Page HP
88 Medium web "AIST press release"
Headline 20nm幅高性能グラフェン微細配線を開発
Date 2013.12.11
Page HP
87 Medium web "The Chemical Daily (WEB)"
Headline 産総研、住友化学など 高電子移動度トランジスタ開発
Date 2013.12.10
Page HP
86 Medium web "日経プレスリリース "
Headline 産総研と東工大など、InGaAsトランジスタの性能向上のための新構造を開発
Date 2013.12.10
Page HP
85 Medium web "AIST press release"
Headline InGaAsトランジスタの性能向上のための新構造を開発
Date 2013.12.10
Page HP
84 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline 検証 最先端研究開発支援プログラム FIRST
産総研・横山直樹氏 【LSIナノテク】 消費電力 数十分の1に
Date 2013.10.16
Page 21
83 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline 検証 最先端研究開発支援プログラム FIRST
産総研・横山直樹氏【LSIナノテク】消費電力 数十分の1に
Date 2013.10.16
Page 21
82 Medium web "EDN Asia (WEB)"
Headline Tunnel FET architecture reduces IC power consumption
Date 2013.8.23
Page HP
81 Medium web "Nanowerk (WEB) "
Headline New tunnel FET architecture shows potential for substantial performance improvements
Date 2013.8.21
Page HP
80 Medium web "Phys.org (WEB) "
Headline Tunnel FET having a new architecture with potential for substantial improvement in performance
Date 2013.8.21
Page HP
79 Medium web "My Navi News (Web)"
Headline 産総研など、多層グラフェンを用いた微細配線作製技術を開発
Date 2013.6.18
Page HP
78 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline 産総研、多層グラフェン使い微細配線の作製技術を開発
Date 2013.6.18
Page 23
77 Medium web "Nikkei Shimbun (Web)"
Headline 産総研、多層グラフェンを用いた微細配線作製技術を開発
Date 2013.6.17
Page HP
76 Medium web "AIST press release"
Headline 多層グラフェンを用いた微細配線作製技術を開発
Date 2013.6.17
Page HP
75 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline 産総研、新構造のトンネルFET開発-動作電流は最大100倍
Date 21
Page 2013.6.13
74 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline 産業技術研究所 ゲルマニウム素子のスイッチング特性 5ケタ超実証
Date 19
Page 2013.6.12
73 Medium Newspaper "The Chemical Daily"
Headline 産業技術総合研究所が開発 新構造トンネルFET 10~100倍の動作電流
Date 8
Page 2013.6.12
72 Medium web "Nikkan Kogyo Shimbun"
Headline 産業技術総合研究所・住友化学 低電圧CMOS 動作実証
Date 2013.6.11
Page 21
71 Medium Newspaper "Japan Metal Daily"
Headline 産業技術総合研究所と住友化学 超低消費電力LSI実現へ
CMOSインバーター試作
Date 2013.6.11
Page 6
70 Medium Newspaper "Nikkei Industrial News"
Headline 動作電流、10~100倍
次世代トランジスタ開発
Date 2013.6.11
Page 9
69 Medium web "Nikkan Kogyo Shimbun"
Headline 産総研・住化、LSIの低電力化に寄与するCMOSインバーター開発
Date 2013.6.11
Page HP
68 Medium web "My Navi News"
Headline 産総研、3D IC向け多結晶Geトランジスタで5桁を超えるオンオフ比を実証
Date 2013.6.10
Page HP
67 Medium web "My Navi News"
Headline 産総研、新構造のトンネルFETで従来比最大100倍の動作電流を得ることに成功
Date 2013.6.10
Page HP
66 Medium web "My Navi News"
Headline 産総研など、GeとInGaAsを用いたCMOSインバータの動作を実証
Date 2013.6.10
Page HP
65 Medium web "Nikkei Shimbun"
Headline 産総研、新たな立体構造を採用した合成電界トンネルFETの動作を実証
Date 2013.6.10
Page HP
64 Medium web "Nikkei Shimbun"
Headline 産総研、3次元積層集積回路向け多結晶Geトランジスタで実用並みのスイッチング特性を実証
Date 2013.6.10
Page HP
63 Medium web "Nikkei Shimbun"
Headline 産総研、GeとInGaAsを用いたCMOSインバーターの動作を実証
Date 2013.6.10
Page HP
62 Medium web "AIST press release"
Headline 大幅な性能向上が期待できる新たな構造のトンネルFET
Date 2013.6.10
Page HP
61 Medium web "AIST press release"
Headline 3次元積層集積回路のための多結晶ゲルマニウムトランジスタ
Date 2013.6.10
Page HP
60 Medium web "AIST press release"
Headline GeとInGaAsを用いたCMOSインバーターの動作を実証
Date 2013.6.10
Page HP
59 Medium Newspaper "Ibaraki Shinbun"
Headline Combine expertise and knowledge
Realize ICT electric power saving
Date 2013.4.28
Page 1
58 Medium Newspaper "Nikkei Industrial News"
Headline Interview - Japan's brains 7
LSI power saving:Dr. Naoki Yokoyama, Leader, GNC, AIST
Overtop Moor with new material
Date 2013.4.12
Page 10
57 Medium web "ExtremeTech"
Headline Researchers create CMOS-compatible, 30nm programmable graphene transistor
Date 2013.2.26
Page HP
56 Medium web "Printed Electronics World"
Headline Graphene transistor with a new operating principle
Date 2013.2.21
Page HP
55 Medium web "Nanowerk"
Headline Researchers fabricate a transistor with a channel length of 3 nanometers
Date 2013.2.19
Page HP
54 Medium web "Phys.Org"
Headline Success in operation of transistor with channel length of 3 nm
Date 2013.2.19
Page HP
53 Medium web "Phys.Org"
Headline Development of graphene transistor with new operating principle
Date 2013.2.19
Page HP
52 Medium web "AZoNano"
Headline AIST, NIMS Develop Novel Graphene Transistor
Date 2013.1.21
Page HP
51 Medium web "House of Japan"
Headline AIST Uses CNTs for TSVs by Improving Heat Conductivity
Date 2012.12.20
Page HP
50 Medium web "EDR,LLC"
Headline AIST succeeded transistor working with 3nm channel length
Date 2012.12.17
Page HP
49 Medium Newspaper "The Chemical Daily"
Headline Developed transistor with 3nm channel length
Date 2012.12.14
Page 8
48 Medium Newspaper "The Chemical Daily"
Headline New transistor using graphene
-High-speed performance in low-power
-Configuration can be changed after forming circuit
Date 2012.12.13
Page 8
47 Medium web "My Navi News"
Headline IEDM 2012 - AIST succeeded verification of transistor working with 3nm channel length
Date 2012.12.13
Page HP
46 Medium web "Nikkei Shimbun"
Headline AIST succeeded transistor working with 3nm channel length
Date 2012.12.12
Page HP
45 Medium web "Nikkan Kogyo Shimbun"
Headline AIST succeeded transistor working with 3nm channel length
Date 2012.12.12
Page HP
44 Medium web "AIST press release"
Headline Succeeded transistor working with 3nm channel length
Date 2012.12.12
Page HP
43 Medium Newspaper "Nikkan Kogyo Shimbun"
Headline AIST and NIMS developed graphene transistor of new working principle - anode reversal under electric control
Date 2012.12.11
Page 14
42 Medium web "Tech-On!"
Headline AIST developed 4-terminal graphene logic transistor
Date 2012.12.11
Page HP
41 Medium web "EDR,LLC"
Headline AIST developed graphene transistor of new working principle
Date 2012.12.11
Page HP
40 Medium web "My Navi News"
Headline IEDM 2012 - AIST developed grahene transistor of 4-digit current on/off
Date 2012.12.11
Page HP
39 Medium web "Nikkei Shimbun"
Headline AIST developed graphene transistor of new working principle - changing polarity under electric control
Date 2012.12.11
Page HP
38 Medium web "AIST press release"
Headline AIST developed graphene transistor of new working principle
Date 2012.12.11
Page HP
37 Medium web "EDN Asia"
Headline AIST develops graphene conductivity control technique
Date 2012.11.27
Page HP
36 Medium web "ElectronicsOnline"
Headline Development of novel conduction control technique for graphene
Date 2012.11.23
Page HP
35 Medium web "Innovations Report"
Headline Researchers have developed a novel technique for controlling the electrical conductivity of graphene.
Date 2012.11.19
Page HP
34 Medium web "AZoNano"
Headline Innovative Technique to Control Electrical Conductivity of Graphene
Date 2012.11.17
Page HP
33 Medium web "Nanowerk"
Headline A novel conduction control technique for graphene
Date 2012.11.16
Page HP
32 Medium Press "Science News"
Headline AIST and NIMS developed Graphene conduction control technology
Date 2012.10.5
Page Page 4
31 Medium web "My Navi News"
Headline AIST created Graphene switching transistor operates at room temperature
Date 2012.9.2
Page HP
30 Medium Press "Nikkan Kogyo Shimbun"
Headline Graphene electricity conduction control - AIST and NIMS, On/Off setting at room temperature
Date 2012.9.26
Page Page 22
29 Medium web "My Navi News"
Headline AIST developed device operation model for circuit simulator stepping toward realization of FET tunnel
Date 2012.9.26
Page HP
28 Medium Press "The Chemical Daily"
Headline AIST developed FET tunnel device operation model - pave the way for power-saving LSI circuit
Date 2012.9.26
Page Page 4
27 Medium Press "Nikkan Kogyo Shimbun"
Headline Developed operation model for circuit design for tunnel field-effect device OVER.
Date 2012.9.26
Page Page 22
26 Medium web "AIST Press Release"
Headline Develop new conduction control technology for graphene
Date 2012.9.25
Page HP
25 Medium web "AIST Press Release"
Headline Develop device operation model for tunnel field-effect transistor
Date 2012.9.25
Page HP
24 Medium Press "Chemical Industry Report"
Headline Contributed to LSI energy consumption developed by AIST Strain GE nano transistor
Date 2012.6.13
Page Page 8
23 Medium web "My Navi News"
Headline AIST developed high-performance strain germanium nano wire transistor
Date 2012.6.12
Page HP
22 Medium Press "Nikkan Kogyo Shimbun"
Headline Upgrade LSI energy consumption technology VLSI symposium 2012
Date 2012.6.12
Page Page 23
21 Medium web "Nikkan Kogyo Shimbun"
Headline AVLSI symposium 2012/AIST Nano wire transistor increasing compression strain
Date 2012.6.12
Page HP
20 Medium web "Nihon Keizai Shimbun"
Headline AIST developed high-performance strain germanium nano wire transistor
Date 2012.6.11
Page HP
19 Medium web "AIST press release"
Headline AIST developed high-performance strain germanium nano wire transistor
Date 2012.6.11
Page HP
18 Medium Journal "AIST TODAY"
Headline Giant magnetoresistive effect from non-magnetic phase-change solid memory
Date 2012.6.1
Page vol.12 no.6 pp.21
17 Medium Paper "DENPA Shimbun"
Headline AIXTRON SE produce graphene on 300mm wafer
Date 2012.4.13
Page Front page
16 Medium web "Solid State Technology"
Headline Graphene grown on 300mm wafers with AIXTRON tool in Japan
Date 2012.4.12
Page HP
15 Medium web "electronicsfeed.com"
Headline Japan's AIST uses Aixtron System
Date 2012.4.12
Page HP
14 Medium web "Semiconductor Today"
Headline Japan's AIST achieves graphene production on 300mm wafers using Aixtron system
Date 2012.4.11
Page HP
13 Medium Journal "RIETI LETTER No.597"
Headline Scientific knowledge Giant magnetoresistive effect appeared from phase-change individual memory
Date 2011.11.30
Page p.8-11
12 Medium Paper "Visual Communications Journal"
Headline AIST broke the ultrahigh density record Discovered 200% magnetoresistive effect at room temperature
Date 2011.10.31
Page P.13
11 Medium web "Tsukuba Science News"
Headline Discovered that PCRAM shows giant magnetoresistive effect
Date 2011.10.26
Page HP
10 Medium web "nanotech Japan (Topics)"
Headline Appeared giant magnetoresistive effect from PCRAM
〜More than 2000% magnetoresistance ratio〜
Date 2011.10.24
Page HP
9 Medium web "EDR,LLC(News)"
Headline NMIJ discovered PCRAM shows giant magnetoresistive effect at room temperature
Date 2011.10.17
Page HP
8 Medium Paper "THE NIKKAN KOGYO SHIMBUN"
Headline Gigantic magnetoresistance effect at room temperature, Phase-chance memory
Date 2011.10.17
Page p.19
7 Medium web "Security on-line news"
Headline Emergence of gigantic magnetoresistance effect from phase-change solid memory
Date 2011.10.14
Page HP
6 Medium web "journal mycom"
Headline AIST released new technology toward the realization of nonvolatile memory integrating PCRAM and MTAM
Date 2011.10.14
Page HP
5 Medium web "NIKKEI Online"
Headline AIST found the phase-change solid memory shows gigantic magnetoresistance effect at room temperature
Date 2011.10.14
Page HP
4 Medium web "Press release"
Headline Emergence of gigantic magnetoresistance effect from phase-change solid memory
Date 2011.10.14
Page HP
3 Medium Journal "Nikkei Electronics"
Headline Graphene into competition of practical use
Flood of applications using “God’s material”
Date 2010.12.27
Page p.63
2 Medium Newspaper "Nikkei Industrial News"
Headline Open the future of Japan by the emerging technology.
The government concentrated the investment in the star researcher.
The expectation of the industrial world rises.
Date 2010.8.30
Page 19
1 Medium Newspaper "Nikkei Industrial News"
Headline Changing state-of-the-art research (II)
To semiconductor "Moore excess"
The limit is challenged by industry-academia-government collaboration
Date 2010.5.26
Page Front page, 11